Laboratoire de Physique des Interfaces et des Couches Minces

CNRS - École polytechnique - Institut Polytechnique de Paris

Advanced crystalline silicon photovoltaics

Written by : Erik Johnson

Advanced crystalline silicon photovoltaics

Researchers at the LPICM are currently leading or participating in multiple projects in crystalline silicon photovoltaic (PV) technology: ANR Industrial Chair project PISTOL (with TotalEnergies) on IBC HJT solar cells, IPVF programs II and III on tandem solar cells, EU Solar Eranet project CUSTCO. The work in the area merges our many years of experience in large area semiconductor thin film plasma processing with the currently dominant PV technologies, based on crystalline silicon wafers.

Our projects involve using plasma processes for many of the layers required for solar cells, including P-type and N-type doped micro- and polycrystalline silicon layers (a-SiOx:H, AlOx) on c-Si wafers for passivated contact architectures (heterojunction and TOPCon), patterned doped layers for heterojunction interdigitated back-contact (IBC) cells, low-temperature epitaxial emitters, and heteroepitaxial thin films for multijunctions.

Skip to Patterned PECVD for Interdigitated Back Contact Solar Cells

Skip to Passivated Contact Solar Cells

Skip to Low Temperature Silicon Epitaxy for Solar Cells

Skip to Heteroepitaxial Silicon Thin Films


Patterned PECVD for IBC solar cells (PISTOL Project, ANR Industrial Chair with TotalEnergies)

The current world record for crystalline silicon solar cell efficiency has been obtained by Kaneka (26.7%) by combining the best aspects of two advanced technologies: Interdigitated Back Contacts (IBC) and a-Si:H passivation (heterojunction thin films, HJT).  However, this combination of technologies does not have a large share in the marketplace due to cost issues associated with combining two technologies.

The PISTOL project aims to circumvent this problem by using patterned plasma to etch or deposit patterned a-Si:H thin films without the use of any masking steps.  This is achieved, as shown in the figure below, by using a plasma reactor electrode with small grooves, so that a plasma is only ignited in certain areas, and the desired process is only performed on those isolated areas.

Cross sectional view of electrode cavity, including slits, substrate, and substrate holder.

This process results in deposition profiles such as those shown in the figure below. Structures with dimensions as small as a few hundred microns are achievable, with good uniformity over entire 128mm x 128mm wafers, making them perfectly suited for IBC solar cells.

Profilometry scan (left) and 3D mapping of profilometry data (right) acquired along a 10 mm length of the line.


Using patterned electrodes with designs suitable for small area solar cells (1 cm x 1 cm), we have demonstrated arrays of lines (as shown in the figure below), suitable for IBC solar cells.  Good solar cell performance has been achieved between single pairs of lines, and we are currently optimizing the process to achieve arrays of full IBC cells.

Arrays of etched lines for small area IBC solar cells, produced with no masking step

Ronan Léal, Bastien Bruneau, Pavel Bulkin, Tatiana Novikova, François Silva; Nada Habka, and Erik V. Johnson, Maskless and contactless patterned silicon deposition using a localized PECVD process, Plasma Souces Sci. Tech. 29 (2020) 025023.  DOI: 10.1088/1361-6595/ab5e2c

Passivated Contact Solar Cells

Passivated contact solar cells are the next generation after the dominant Al-BSF architecture. In passivated contact solar cells, the recombination loses at the contact metal electrodes is minimized by having them localized, thus reducing the contact area as much as possible. However, this requires adding steps and complexity to the fabrication process. Within the PhD thesis of Anatole Desthieux we study the deposition of various thin films by PECVD in order to form passivated contact solar cells. Different types of c-Si materials (FZ, CZ and moonlike) are used as a base material, which after proper cleaning, are loaded into the PECVD reactors for the deposition of a-SiOx:H, n-type and p-type µc-SiOx:H and a-SiN:H thin films. These layers form a passivated contact solar cell with high effective lifetimes and implied Voc. The work, in collaboration with EDF, IPVF and Photowatt has allowed to reach cell precursors with implicit Voc values as high as 700 mV on 156×156 mm monolike type wafers produced by Photowatt, even after a high temperature firing step, required for the metal contacts to diffuse through the a-SiN:H dielectric passivation layer.

Effective carrier lifetime measured on a quarter of 4” P-type FZ c-Si solar cell precursor passivated with a layer stack consisting of: a-SiOx chemical oxide/N-type µc-Si:H/a-SiN:H on one side and a-SiOx chemical oxide/P-type µc-Si:H/a-SiN:H on the other side, after a rapid thermal anneal at 602. Note the excellent values of lifetime.

Low Temperature Silicon Epitaxy by PECVD

It is well known that epitaxial growth usually requires high temperatures and atomically flat surfaces in order to allow adatoms to find minimum energy positions for their incorporation in the growing material. Therefore, MBE and MOCVD are the techniques which are mostly used to achieve epitaxial growth. Moreover, in c-Si PV, thin doped crystalline layers are usually produced by high temperature diffusion of dopant atoms or by ion implantation followed by annealing to remove the electronic defects generated by implantation and to activate the dopant atoms.

Over the past 15 years we have been developing low temperature PECVD epitaxy, a process that may accidentally happen during a-Si:H deposition on a c-Si wafer for heterojunction solar cells, and which leads to a deterioration of the passivation properties in that case. We have turned this problem into an advantage by developing PECVD epitaxy to grow relatively thick (1 – 5 µm) c-Si layers which can be transferred to foreign substrates (glass or plastic foils) to build electronic devices. More recently the PECVD epitaxy has been applied to make ultrathin doped layers to act as the emitter in a N/P junction solar cells. The benefits of the PECVD process are: low thermal budget, no oxide formation (as opposed to the thermal diffusion case), iii) doped layer only on one side of the wafer, iv) the possibility of producing abrupt ultra-shallow junction and v) the possibility to obtain a controlled doping profile. The figure below gives an example of a thin p-type epitaxial layer deposited on a n-type c-Si wafer to produce a P-N junction. The FFT carried out on both sides of the junction demonstrate that the p-type epi-layer has the same orientation of the crystalline substrate (epitaxy is achieved), while the inverse Fourier filtering with (100) planes mask highlights the continuity of the c-Si planes at the interface. Further developments target at the formation of tunnel junctions for tandem solar cells where the bottom cell is based on c-Si and the top cell on wider bandgap materials such as III-Vs or perovskites.

HRTEM image showing the defect free P-N junction obtained by PECVD epitaxial growth of P-type c-Si on a N-type c-Si wafer. This topic has been developed during the thesis of Ronan Léal and Marta Chrostowski. TEM image courtesy of Guillaume Noircler.

Heteroepitaxial Silicon Thin Films

Incorporation of photonic devices into integrated circuits to speed up microprocessors is a ubiquitous challenge. In particular, the growth of III-V materials on c-Si is faces fundamental problems such as:

  1. the difference of lattice parameter between c-Si and GaAs which results in the built up of strain which will relax via the formation of treading dislocations which degrade the optoelectronic properties of the material;
  2. ii) the differences in thermal expansion coefficient which again results in the buildup of strain and defects when cooling down the sample from a high growth temperature (> 500 °C); and
  • the fact of III-V materials being polar, which leads to the formation of antiphase domains when III-V materials are grown on c-Si.

Based on our experience on low temperature PECVD epitaxy, we have developed the growth of c-Si on III-V materials which solves the above issues respectively thanks to:

  1. our particular local epitaxial process based on the impact of silicon clusters;
  2. the low temperature of the PECVD epitaxial process (175 °C) and
  • the reversal of the order of the deposition; i.e. growing the c-Si on III-V materials.

These studies have been the topic of the thesis of Romain Cariou and Gwénaëlle Hamon. More recently, in order to allow for the standard order of deposition; i.e. growing the III-V material on c-Si, we have developed the PECVD epitaxy of ultrathin Ge layers on c-Si to act as virtual substrates for the growth of GaAs on these virtual substrates. The figure below shows a HRTEM image of a GaAs grown on such virtual substrates, demonstrating a good epitaxial layer. This concept is currently being applied to produced tandem solar cells.

HRTEM image of a c-Si/20 nm PECVD epitaxial Ge virtual substrate on which a 0.38 µm GaAs thin film has been deposited by MOCVD in collaboration with III-V Labs. Image courtesy of Ileana Florea